The present invention relates, in general, to electronics, and more particularly, to semiconductors, structures thereof, and methods of forming semiconductor devices.
In the past, the semiconductor industry utilized various device structures and methods to form semiconductor devices that used Group III-nitride structures, such as gallium nitride (GaN), as one of the semiconductor materials. Group III-nitride semiconductors have been known to exhibit a large dielectric breakdown field of greater than 3.0 MV/cm. Also, Group III-nitride heterojunction structures have been capable of carrying a very high current, which has made some devices fabricated in the Group III-nitride material system appropriate for high power-high frequency applications.
The devices fabricated for these types of applications have been based on general device structures that exhibit high electron mobility and have been referred to variously as heterojunction field effect transistors (HFETs), high electron mobility transistors (HEMTs), or modulation doped field effect transistors (MODFETs). These types of devices typically were able to withstand high voltages, such as in the range of 100 Volts, while operating at high frequencies, typically in the range of 1-100 GHz. These types of devices have been modified for a number of types of applications, but typically GaN-based devices have operated through the use of piezoelectric polarization fields to generate a two dimensional electron gas (2DEG) region that has allowed transport of very high current densities with lower resistive losses.
Previous HEMT devices have utilized trench structures formed in an active area of the transistor. Portions of the trenches were utilized as the gate regions of the transistor. One problem with such prior transistors was the on resistance characteristics were too high. Efforts to reduce the on resistance typically resulted in significant increases in manufacturing costs. Also, other prior transistors had a high source inductance and further had a source configuration that increased difficulty in integrating the transistors together for various applications.
Accordingly, it is desirable to have a semiconductor device and a method of forming the semiconductor device that uses GaN or other Group III-nitride series materials, which has a lower on-resistance, a lower cost of manufacture, a reduced source inductance, and/or an improved structure for integration with other devices.
For simplicity and clarity of the illustration(s), elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements, unless stated otherwise. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current through the device such as a gate of an MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-Channel devices, or certain N-type or P-type doped regions, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with the present invention. Also, the devices explained herein can be Ga-face GaN devices or N-face GaN devices. One of ordinary skill in the art understands that the conductivity type refers to the mechanism through which conduction occurs such as through conduction of holes or electrons, therefore, and that conductivity type does not refer to the doping concentration but the doping type, such as P-type or N-type. It will be appreciated by those skilled in the art that the words during, while, and when as used herein relating to circuit operation are not exact terms that mean an action takes place instantly upon an initiating action but that there may be some small but reasonable delay(s), such as various propagation delays, between the reaction that is initiated by the initial action. Additionally, the term while means that a certain action occurs at least within some portion of a duration of the initiating action. The use of the word approximately or substantially means that a value of an element has a parameter that is expected to be close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. It is well established in the art that variances of up to at least ten percent (10%) (and up to twenty percent (20%) for semiconductor doping concentrations) are reasonable variances from the ideal goal of exactly as described. The terms first, second, third and the like in the claims or/and in the Detailed Description of the Drawings, as used in a portion of a name of an element are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking or in any other manner. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments described herein are capable of operation in other sequences than described or illustrated herein. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants the edges of doped regions generally may not be straight lines and the corners may not be precise angles. Additionally, it is to be understood that where it is stated herein that one layer or region is formed on or disposed on a second layer or another region, the first layer may be formed or disposed directly on the second layer or there may be intervening layers between the first layer and the second layer. Further, as used herein, the term formed on is used with the same meaning as located on or disposed on and is not meant to be limiting regarding any particular fabrication process.
Moreover, the description illustrates a cellular design (where the body regions are a plurality of cellular regions) instead of a single body design (where the body region is comprised of a single region formed in an elongated pattern, typically in a serpentine pattern). However, it is intended that the description is applicable to both a cellular implementation and a single base implementation.